Trimaran

Trimaran was released and maintained by the ReaCT-ILP laboratory at NYU before the transition to CREST, Georgia Institute of Technology where it is currently being maintained. Please visit the Trimaran web page for more information.

Trimaran serves as the primary vehicle for conducting our group's research, the results of which have in turn led to significant contributions to the Trimaran infrastructure.

About Trimaran
The Trimaran System is an integrated compilation and performance monitoring infrastructure. The architecture space that Trimaran covers is characterized by HPL-PD, a parameterized processor architecture supporting novel features such as predication, control and data speculation and compiler controlled management of the memory hierarchy. Trimaran also consists of a full suite of analysis and optimization modules, as well as a graph-based intermediate language. New optimizations and analysis modules can be easily added, deleted or bypassed, thus facilitating compiler optimization research. Similarly, computer architecture research can be conducted by varying the HPL-PD machine via the machine description language HMDES. Trimaran also provides a detailed simulation environment and a flexible performance monitoring environment that automatically tracks the machine as it is varied.

Contributions of React-ILP Laboratory (Courant Institute, NYU) and CREST (Georgia Tech) to Trimaran.

The Team

	Krishna V. Palem coordinates the group that is making the Trimaran system available to institutions for research in EPIC architectures, and their compiler optimizations. He directed the research of the ReaCT-ILP laboratory. The Trimaran system in its current form, and the collaboration between the principals has its genesis in his visit to HP-Labs in 1995, seeking to develop an infrastructure to enable the research by members of the ReaCT-ILP team in EPIC, with emphasis on embedded systems.
	Hansoo Kim managed the evolution of Trimaran. In addition to this central role, he led the development of Trimaran's region based register-allocator that addresses novel challenges raised by predicated execution.
	Rodric M. Rabbah lead the Trimaran support effort for the last several years. He maintains the infrastructure and has contributed several optimizations to the compiler, including data remapping, cache sensitive scheduling, and data prefetching. His contributions also include a cycle-accurate processor and memory hierarchy simulator.
	Amit Nene, was an assistant research scientist and the chief architect of Trimaran's performance monitoring environment. Designed collaboratively with Robert Dewar, this environment has a very innovative feature that allows the execution of locally compiled code with pre-compiled libraries, seamlessly. It permits monitoring the execution profiles of programs at a very fine-grain level.
	Jinwoo Kim (presently at CREST) was an assistant research scientist at the ReaCT-ILP laboratory involved with Trimaran's maintenance and and he is currently Trimaran's webmaster. He is a Ph.D. student with his research interests are in the areas of Embedded Systems and Multimedia, and their interactions.
	Marc Saint was an assistant research scientist working primarily on the programmable memory hierarchy component of Trimaran. He collaborated with Rodric Rabbah in his research efforts in this area.

	Allen Leung collaboratively developed a language TimeC that permits programmers to express timing constraints in languages such as C, C++ and Java. This innovation will be integrated into Trimaran. The goal is to design instruction scheduling and other optimizations that helps enforce these timing-constraints in addition to conventional program dependences.		Igor Pechtchanski developed an integrated register allocation and scheduling framework in Trimaran. He also collaborated with Amit Nene on aspects of the design of the performance monitoring environment.
	Suren Talla (at present at CREST) has done research on compiler-controlled memory hierarchies, with the goal of making memory access latencies predictable. Working within the HPL-PD framework in Trimaran, he has collaborated with Rodric Rabbah on using program profiles to guide prefetching and replacement.		Sam Tregar was the architect of Trimaran's GUI based user environment.

	Ben Goldberg, in collaboration with members of the ReaCT-ILP laboratory developed elaborate tutoring and other documentation, with the intent of making Trimaran easily accessible to new users.
	Kanchi Gopinath of the Indian Institute of Science collaborated with Krishna Palem on the Trimaran system and compiler optimization research. Collaboratively, he worked with and guided the research of Hansoo Kim on the region-based register allocator. He worked with Suren Talla on compiler-controlled memory hierarchy management. He also lead the effort, with Pradeep Jain to make Trimaran available in a Linux environment.
	Amir Pnueli of the Weizmann Institute of Science and NYU collaborated on the development of the TimeC notation as well as on the foundations of instruction scheduling algorithms that obeys timing constraints. The ReaCT-ILP laboratory and the Minerva Center at the Weizmann Institute that he heads collaborated on applying verification technology to Trimaran with the goal of enabling highly assured optimizing compilers.